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Ladder

A ladder-diagram (PLC) style front end - it cannot build phone UI programs.

What works on this path is compiling and running itself; the whole UI interface set (windows, drawing, input) has no corresponding syntax (there is no "function call with a string argument").

How to run it on your phone

vml run examples/ladder/test/sysinfo.ld

Compiling takes a while (one to two minutes for C, a few seconds for scripting languages). Once the program is running, the gamepad is at the bottom of the screen - the D-pad and the four action buttons are all there. Tap the back arrow in the top-right corner to return to the Shell.

What to know before you write

Examples

FileWhat it shows
test/file_io.ldEmpty test (NOP)
test/sysinfo.ldPlaceholder - this path cannot call the JSON interface

Also in this folder: demo/demo_std.ld, motor_control/main.ld, test/libdemo.dbf, test/libs.ld, tty/demo_tty.ld, ui/demo_ui.ld

Pitfalls we hit on real devices

The rest of this page is taken straight from the VML source (third_party/vml/VMLPrepares/LadderCompiler/): the README covers what this front end supports and how to compile it, and the language reference covers the syntax itself. When upstream changes, regenerating this page brings it up to date.

Language reference

Ladder Diagram language compiler specification

Version: v1.0 | Date: 2026-07-06 | Revised by: Shenzhen Tanso Intelligent Technology Co., Ltd.

Standards

FieldValue
Target standardIEC 61131-3 subset (2003)
Publication year2003
Completeness~98%
MCU completeness~97%
Tests0 (the test directory is yet to be created)
Updated2026-05-18: timers reimplemented on the SYSCALL #53 real-time clock; code generator status corrected

Keywords (instructions)

Contacts: NO (normally open) NC (normally closed) POS (positive edge) NEG (negative edge) Coils: OUT (output) SET (set) RST (reset) Timers: TON (on-delay) TOF (off-delay) TP (pulse) Counters: CTU (up counter) CTD (down counter) CTUD (up/down counter) Comparison: EQ NE GT GE LT LE Arithmetic: ADD SUB MUL DIV MOD Program control: JMP LBL RET END Other: MOVE SEL MUX LIMIT

Overview

This compiler compiles the IEC 61131-3 Ladder Diagram language into VML (Virtual Machine Language) assembly. Ladder Diagram is a graphical programming language widely used in industrial control, for programming programmable logic controllers (PLCs).

Language features

1. Basic ladder elements
Contacts
Coils
Function blocks
2. Data types (IEC 61131-3)
Elementary data types
Derived data types
3. Program structure
Program declaration
PROGRAM MotorControl
VAR
    StartButton AT %IX0.0 : BOOL;
    StopButton AT %IX0.1 : BOOL;
    MotorRun AT %QX0.0 : BOOL;
    Timer1 : TON;
END_VAR
Variable declaration sections
I/O mapping
4. Ladder rung structure
Simple rung
     Start    Stop     Motor
     ─┤ ├─────┤/├──────( )─
       I0.0    I0.1      Q0.0
Parallel branch
     Button1     Lamp1
     ─┤ ├────┬───( )─
            │
     Button2│
     ─┤ ├────┘
Series branch
     Start     Timer1.PT := T#5s
     ─┤ ├──────[TON]─────
       I0.0     Timer1
                IN  Q
                PT  ET
Function block call
     Start     MotorCtrl
     ─┤ ├──────[FB]─────
                EN  ENO
               Start Run
               Stop  Fault
               Speed ActualSpeed
5. Timers and counters
Timer (TON - on-delay)
VAR
    Timer1 : TON;
    TimeValue : TIME := T#5s;
END_VAR

// ladder representation
     Start     Timer1
     ─┤ ├──────[TON]─────
                IN  Q
               PT  ET

Function: when IN is TRUE the timer starts; once the PT time has elapsed Q becomes TRUE. ET shows the elapsed time.

Counter (CTU - up counter)
VAR
    Counter1 : CTU;
    PresetValue : INT := 10;
END_VAR

// ladder representation
     Pulse     Counter1
     ─┤P├──────[CTU]─────
                CU  Q
               PV  CV
                R

Function: counts on the positive edge of CU; Q is TRUE when CV >= PV; the R signal resets the counter.

6. Instruction List (IL) support

The ladder compiler also supports the Instruction List text format:

LD StartButton
ANDN StopButton
OUT MotorRun

LD MotorRun
TON Timer1, T#5s
7. Structured Text (ST) support

Structured Text can be embedded in a ladder diagram:

IF StartButton AND NOT StopButton THEN
    MotorRun := TRUE;
    Timer1(IN:=TRUE, PT:=T#5s);
END_IF;
8. Standard functions
Bit operation functions
Math functions
Comparison functions
Type conversion functions
String functions
9. VML code generation conventions
Bit operation mapping
Ladder contact: ─┤ ├─
VML code:       MOVE R0, [I0.0_address]
                CMP R0, #1
                JNE skip_branch

Ladder coil:    ─( )─
VML code:       MOVE R0, #1
                MOVE [Q0.0_address], R0
Timer implementation (using the SYSCALL #53 GetTick real-time clock)

TON (on-delay timer):

TOF (off-delay timer):

TP (pulse timer):

CTUD (up/down counter):

Counter implementation (with overflow protection)

CTU (up counter):

CTD (down counter):

CTUD (up/down counter):

10. I/O memory mapping
Input image area
Address range: 0x8000 - 0x80FF (256 bytes)
Purpose: stores digital input states
Access: MOVE R0, [0x8000]  ; read the first input byte
Output image area
Address range: 0x8100 - 0x81FF (256 bytes)
Purpose: stores digital output states
Access: MOVE [0x8100], R0  ; write the first output byte
Holding register area
Address range: 0x8200 - 0x83FF (512 bytes)
Purpose: stores intermediate variables, timers, counters and so on
Special registers
Address: 0x8400 - system time (milliseconds)
Address: 0x8404 - scan cycle
Address: 0x8408 - error code
11. Scan cycle model

A ladder program executes according to the scan cycle:

Start scan
├── Read physical inputs into the input image area
├── Execute the user program (ladder logic)
├── Write the output image area to the physical outputs
└── Handle system tasks (communication, diagnostics and so on)

VML implementation:

LABEL main_scan_cycle
    ; 1. read inputs
    CALL read_physical_inputs
    
    ; 2. execute the user program
    CALL user_program
    
    ; 3. write outputs
    CALL write_physical_outputs
    
    ; 4. update system time
    CALL update_system_timer
    
    ; 5. check the scan cycle time
    MOVE R0, [current_time]
    SUB R0, [scan_start_time]
    CMP R0, [max_scan_time]
    JLE scan_ok
    
    ; scan timeout error
    MOVE R0, #1
    MOVE [scan_timeout_error], R0
    
scan_ok:
    ; wait for the next scan cycle
    CALL delay_scan_cycle
    JMP main_scan_cycle
12. Example programs
Motor start/stop control
PROGRAM MotorControl
VAR
    StartButton AT %IX0.0 : BOOL;
    StopButton AT %IX0.1 : BOOL;
    MotorRun AT %QX0.0 : BOOL;
    Overload AT %IX0.2 : BOOL;
    Timer1 : TON;
END_VAR

// ladder logic
     Start    Stop    Overload   Motor
     ─┤ ├─────┤/├─────┤/├──────( )─
       I0.0    I0.1    I0.2      Q0.0
     
     Motor     Timer1
     ─┤ ├──────[TON]─────
                IN  Q
               PT  ET
              T#5s
     
     Timer1.Q    Alarm
     ─┤ ├────────( )─
                     Q0.1
Conveyor line control
PROGRAM ConveyorControl
VAR
    Sensor1 AT %IX0.0 : BOOL;
    Sensor2 AT %IX0.1 : BOOL;
    Motor1 AT %QX0.0 : BOOL;
    Motor2 AT %QX0.1 : BOOL;
    Counter1 : CTU;
    PartsCount : INT;
END_VAR

// product counting
     Sensor1    Counter1
     ─┤P├──────[CTU]─────
                CU  Q
               PV  CV
               10
                R
     
     Counter1.Q   PartsCount := Counter1.CV
     ─┤ ├─────────────────[MOV]─────
     
// conveyor control
     Sensor1    Sensor2    Motor1
     ─┤ ├───────┤/├────────( )─
     
     Sensor2           Motor2
     ─┤ ├──────────────( )─
Floating-point and 64-bit compile modes

The VML toolchain controls the handling strategy for floating point and 64-bit integers through three compile parameters:

ParameterOptionsDefaultDescription
--float32hard / soft / nonehard32-bit float (REAL) handling mode
--float64hard / soft / nonesoft64-bit float handling mode
--int64hard / soft / nonesoft64-bit integer handling mode
32-bit float (float32)

The REAL type in this language (32-bit single-precision float) is compiled in the following modes:

64-bit float (double)

The VML compile layer supports 64-bit double-precision floating-point arithmetic. The ladder language itself does not define the corresponding LREAL type, but the compiler reserves extension support for it.

64-bit integer (int64)

The 64-bit integer types such as DLONG / LINT in the IEC 61131-3 ladder language are compiled in the following modes:

Software emulation libraries

All the software emulation libraries above live in the Lib/shared/ directory, are written in C and are compiled to VML by the C compiler; every language shares them:

Library filePurposeCore functions
softfloat.cQ15.16 fixed-point 32-bit float emulation__vml_float_add/sub/mul/div/neg/abs/cmp, __vml_int2float/float2int
softdouble.cIEEE 754 double-precision 64-bit float emulation__vml_double_add/sub/mul/div/neg/abs/cmp, __vml_int2double/double2int, __vml_float2double/double2float
softint64.c64-bit integer dual-register emulation__vml_i64_add/sub/neg/and/or/xor/not/shl/shr
13. Compilation limitations and notes
Current implementation status
Features still to be implemented
  1. Code generation from ladder diagram to VML instructions — ⚠️ essentially complete
  2. Timer and counter function blocks — ✅ implemented (TON/TOF/TP/CTU/CTD/CTUD)
  3. I/O memory mapping management
  4. Scan cycle scheduling
  5. Standard function library implementation (MOVE/SEL/MUX/LIMIT)
Technical challenges
  1. Graphics to text conversion: the ladder diagram is a graphical language; a textual instruction list is used as the intermediate representation
  2. Real-time requirements: PLC programs have strict real-time requirements — timers use the SYSCALL #53 millisecond clock
  3. Bit operations: contacts/coils need efficient bit operations and edge detection
  4. Retentive variables: variable values have to be retained across a power loss
14. Integration with the VML runtime

A ladder program interacts with the VML runtime in the following ways:

System calls
15. Application areas

The ladder diagram compiler is mainly used in:

By compiling ladder diagrams into VML code, traditional PLC programs can run on the VML virtual machine, enabling cross-platform porting and simulation testing of industrial control programs.

🆕 String encoding (v1.65.19)

This language compiler uses the VML string system indirectly through the shared library (Lib/shared/).

DirectiveWidthEncodingC type
.string8-bitUTF-8char*
.wstring16-bitUTF-16LEwchar_t*
.ustring32-bitUTF-32LEchar32_t*

MCU mode (default): string output is UTF-8 (.string) OS mode: the encoding can be determined through the VML_WSTRING macro

The shared library already provides wide-string conversion functions (wchar.h/uchar.h) that each language compiler can use as needed.

Compiler README

Ladder Diagram (IEC 61131-3 subset) compiler

Path: VMLPrepares/LadderCompiler/ Completeness: ~98% | 🟢 production ready Standard library: Lib/ladder/

Features

Compile modes

MCU mode (default, --mode mcu)

MCU mode is tuned for microcontroller / bare-metal environments (Arduino/STM32/8051 and so on) and automatically skips features that are incompatible with an operating system.

Skipped (no code is generated for these constructs):

Kept (the low level is provided by the BIOS):

OS mode (--mode os, reserved)

OS mode targets environments with an operating system (embedded Linux, an RTOS and so on); it will support the full set of language features (file system, threads, async, exceptions, reflection and so on).

RAM level
Safe MCU coding notes

Usage

dotnet run --project VMLTool -- input.lad -o output.vml

Tests

Test/La/ — 0 test files (the test directory is yet to be created)